You will be a member of the team in Converged Core Development Organization (CCDO) that designs analog and mixed-signal layout on advanced CMOS technology. Work is performed within broadly defined parameters. Assignments are highly complex and nonstandard in nature. Your responsibilities will include but not be limited to:
- Independently assess and plan complex layout assignments to meet challenging schedule
- Work closely with circuit designers to plan and design layout for I/O, PLL, TS and/or other analog/mixed-signal circuitry
- Build and verify all levels (leaf cell, IP block and Fub) of analog and mixed-signal layout using Genesys, ICV/Hercules and RV tools
- Collaborate with other projects on analog IP sharing
- Ability to quickly adapt to rapidly changing project conditions and exhibit the initiative to continually expand your skill set.
- Good communication skills (verbal and written)
- A team player willing to share knowledge effectively
- A self starter proactively seeking solutions
- Good problem solving skills.
- Strong sense of discipline and team work.
- Good flexibility and multitasking skills.
You should possess at least an AA degree in science/technical/engineering fields (equivalent military experience is acceptable) and 3+ years of experience in analog/mixed-signal layout. Additional qualifications include:
- Understanding of process technology and the impact of layout practices on circuit performance.
- Proficient with Virtuoso, Genesys, ICV/Hercules and RV tools.
- Understanding of layout robustness issues: electro-migration, self-heating and cross capacitance
- Programming skills (UNIX shell script, Perl, Tcl) would be an added advantage
Experience Required3+ years